作者yellowfishie (喵喵喵喵~~~)
看板NTUGIEE_EDA
標題paper review
時間Mon Feb 6 14:52:48 2006
Dear all,
我們共有 25 篇 paper 要 review,
下面是分配的篇數。
博五 陳泰蓁 x2 博一 陳皇宇 x1 碩二 陳彥賓 x1
博三 方宇綸 x2 博一 方家偉 x1 碩一 林忠緯 x1
博三 喻秉鴻 x2 博一 林依潔 x1 碩一 周思睿 x1
博二 陳東傑 x2 博一 林柏宏 x1 碩一 許欽雄 x1
博二 江哲維 x1 碩二 蔣梅芳 x1 碩一 陳信成 x1
博二 李婉萍 x1 碩二 林翠薏 x1 碩一 劉宏毅 x1
博二 廖光萬 x1 碩二 許天彰 x1 碩一 李奇峰 x1
下面是 paper 的詳細資料,
選擇的規則同之前,年級愈低優先權愈高。
若之前老闆有先用 email assign 給一些人 review,請加註 "assigned"
(我沒這些資料),這些被 assigned 的 paper 就由所指定的人 review。
paper 會由 email 寄給各位。
GLSVLSI 115 Block Alignment in 3D Floorplan Using Layered TCG
GLSVLSI 123 Fast Floorplanning for FPGAs with Heterogenous Resources
GLSVLSI 126 The O-Sequence: Representation of 3D-Floorplan Dissected
by Rectangular Walls
GLSVLSI 128 Does Partitioning Matter for 3D Floorplanning?
GLSVLSI 140 GRP: A Top-down Placement Algorithm for Reducing the Global
Interconnect Count
GLSVLSI 141 Low-Power Clustering with Minimum Logic Replication for
Coarse-grained, Antifuse based FPGAs
GLSVLSI 169 DTS: A Tree Based Representation for 3D-Block Packing
DAC 11 Etch and Photolithography Process Interaction Effects
Implication for Device Layout Design
DAC 65 Fast Wire Length Estimation by Net Bundling for Block Placement
DAC 78 A Stable Metric for VLSI Interconnect
DAC 128 Lithographic Computation - the Present and the Future
DAC 241 Automated Regression Test Selection for Optical Proximity
Correction
DAC 272 A H.264 HDTV Decoder Chip with Novel Physical Design Methods
DAC 299 A Novel General Graph-Based Simplex Algorithm Applied to IC
Layout Compaction and Migration
DAC 305 Voltage Islands Generation in Chip Level Floorplanning
Considering Performance Constraints
DAC 331 Litho-friendly Layout for a 45nm Node Static CMOS Reduced
Standard Cell FinFET Library
DAC 462 Analysis of SOI circuit performance variability by
Non-Equilibrium Initial Condition Analysis, NEICA
DAC 515 Fast and Accurate Litho-Hotspot Dectection Using Range Pattern
Matching
DAC 516 Faster, Parametric Trajectorybased Macromodels Via Localized
Linear Reductions
DAC 636 Standard Cell Characterization Considering Lithography Induced
Variations
DAC 734 Incremental Placement for Structured ASICs using the
Transportation Problem
DAC 838 Hippocrates: First-Do-No-Harm Detailed Placement
DAC 879 An Automated Core Power Network Closure Methodology
DAC 985 A New LP Based Incremental Timing Driven Placement for High
Performance Designs
TCAD 2910 Reticle Floorplanning and Wafer Dicing for Multiple Project
Wafers: A Volume-Driven Compatibility Optimization Approach
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◆ From: 220.129.105.42
※ 編輯: yellowfishie 來自: 220.129.105.42 (02/06 14:59)
1F:推 ye11owfish:請儘快回覆 02/06 15:11