http://osa-55.adm.ncu.edu.tw/alumni/pages/jobs.php NVIDIA徵才(台北&上海) 行業類別：電子及零組件業/半導體業&設備/光電體/家電業 連絡人：巫宜臻 統一編號：80022300 電話：02-6605-5700 傳真：02-8751-2212 郵遞區號：１１４ 連絡地址：臺北市基湖路8號 E-mail：[email protected] WWW：http://www.nvidia.com.tw 求才條件 (一) 需求職稱：GPU Driver Engineer (TPE only) 工作地點：台北或上海 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧Work with GPU driver software engineers and HW engineers to understand user issues and innovate solutions for Window NB Operating Systems. ‧Use your experience in Windows operating system and hardware fundamentals to support development of next generation multimedia graphics solutions for Windows NB platform. 備註： MINIMUM REQUIREMENTS ‧BSCS or MSCS or equivalent ‧Have experience working on large and complex pieces of software and have strong debugging skills. ‧Detailed knowledge of operating system internals, C/C++ language, object-oriented design, as well as various device driver models. ---------------------------------- (二) 需求職稱：GPU PHYSICAL DESIGN ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧Run Static Timing Analysis (STA) at the both the block and full chip level using industry standard STA tools ‧Work in conjunction with Place and Route Engineers to achieve timing closure ‧Develop tcl and dc-shell scripts for performing ECO's. ‧Contribute to the ongoing development and enhancement of our entire timing methodology 備註： MINIMUM REQUIREMENTS ‧MS in Electrical Engineering or Computer Science ‧Strong RTL programming ability, C/C++ and Perl preferred ‧Great interest in the area of ASIC physical design, Static Timing Analysis and RTL ----------------------------------------- (三) 需求職稱：GRAPHICS ARCHITECT 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧Develop algorithms and design hardware extending the state of the art in hardware support for computer graphics. Working within a team of graphics architects to document, design, and develop functional and performance simulators validate and verify each new chip. ‧Develop tests, test plans, and testing infrastructure for new graphics architectures. ‧Design and implement automated testing strategies. Test and debug CMODELs, RTL simulation and real silicon. 備註： MINIMUM REQUIREMENTS ‧MS in CS, EE or Math, and great interest in the algorithms of computer graphic ‧Relevant industrial experience preferred. ‧Strong C, C++ programming ability, Perl ----------------------------------------- (四) 需求職稱：3D PERFORMANCE TOOLS SOFTWARE ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧Design and implement 3D graphics profiling and debugging applications for the PC, Embedded and Mobile 3D development community ‧Develop applications (e.g. PerfHUD) that will assist developers with identifying bottlenecks and inconsistencies in their 3D graphics application ‧Provide professional solutions to level out the difficulties arising from the development of high-end 3D graphics application. 備註： MINIMUM REQUIREMENTS ‧Master, major in computer science, mathematics, computer graphics ‧In depth knowledge of at least one 3D graphics API: OpenGL, OpenGL ES or Direct3D. ‧Strong C/C++ and mathematic skills -------------------------------------------------- (五) 需求職稱：CIRCUIT DESIGN ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧High performance, low power custom circuit design for graphics processors. ‧Circuit architecting, simulation and characterization of custom design circuit ‧Logic equivalence checking and transistor level function verification. 備註： MINIMUM REQUIREMENTS ‧BSEE minimum, MSEE preferred. Strong background in deep submicron CMOS process and device ‧Good knowledge in high speed circuit design techniques and understanding of on-chip interconnect and signal integrity ‧Experience in circuit simulation, schematic capture and layout verification CAD tools. ------------------------------------------ (六) 需求職稱：NOTEBOOK ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧Characterization of next generation Notebook GPU ASICs. ‧High speed bus signal integrity debug/characterization. ‧Troubleshooting and silicon debug. 備註： MINIMUM REQUIREMENTS ‧Programming skills in C and/or Perl. ‧Understanding of BIOS, drivers, lower power ASIC design and other software applications ‧Experience with digital logic design, analog design a plus ------------------------------------------------- (七) 需求職稱：PHYSICAL DESIGN ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： MINIMUM REQUIREMENTS ‧MSEE or MSCS. Courses taken in digital design, logic design and verilog synthesis 備註： MINIMUM REQUIREMENTS ‧Project experience in VLSI physical design implementation ------------------------------------------------- (八) 需求職稱：ASIC DESIGN ENGINEER 工作地點：台北或上海 待遇範圍：面議 需求人數：1 截止日期：2010/07/01 學歷： 大學 碩士 科系： 電資院 電資-電機(電子) 電資-資工(資訊系統與應用) 電資-通訊 電資-光電 相關事項： RESPONSIBILITIES ‧ASIC Design for graphics and video processors. ‧Micro-architecture definition; working closely with video / graphics and system architects. ‧RTL design, verification, emulation, synthesis, timing, and s ilicon bring-up. MINIMUM REQUIREMENTS ‧MS in EE or related area ‧Strong RTL programming ability, familiar with all aspects of the frontend ASIC design flow ‧Strong programming skills in C/C++, PERL preferred. ---------------------------------------------------------- -- 2010 臺千大企業最愛大學生》中大第11名輸淡江、逢甲、北科 [email protected] http://www.cw.com.tw/article/index.jsp?page=8&id=40582 http://www.cw.com.tw/article/index.jsp?id=40582 台大4連霸，淡江私校13年稱王、技職台科大第1 2010年「台灣1000大企業最愛大學生調查」，當企業招募新鮮人的意願越來越低時，從 校園開始，就該如何做好準備？ --

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