TSMC pushes out high-k in 28-nm rollout Mark LaPedus (09/29/2008 5:00 H EDT) SAN JOSE, Calif. Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) has rolled out its 28-nm process and revealed a surprise: It has pushed out--or delayed--its initial high-k/metal-gate offering until 28-nm, putting it slightly behind its rivals in Chartered, IBM and Samsung. TSMC was originally supposed to have its high-k/metal-gate offering at the 32-nm node. Silicon foundry giant TSMC (Hsinchu, Taiwan) also provided details of its yet-to-be-introduced 32-nm process. The 32-nm process is a cost-down version of its 40-nm technology, while 28-nm is considered by TSMC as a ''full-node'' offering. As expected, both the 32- and 28-nm processes make use of 193-nm immersion lithography, copper-interconnects, ultra low-k dielectrics, strained-silicon and other features. At 28-nm, TSMC plans to offer two separate options for the gate stack: conventional silicon oxynitride (SiON) and a newfangled high-k/metal-gate technology. It will offer two 28-nm versions with high-k and metal gates: a low-power and high-performance technology. But at 32-nm, the company will only offer a SiON for the gate stack, which appears to be a change in direction for TSMC. Earlier this year, TSMC CEO Rick Tsai vowed that the company would bring out its initial high-k/metal-gate technology at the 32-nm node. Now, TSMC's high-k/metal-gate offering has been pushed out to 28-nm. High-k and metal gates are key building blocks for scaling the critical gate stack, enabling the next-generation transistor. TSMC declined to comment on the specifics of the technology. Perhaps the Taiwanese company is still developing high-k and is stalling for time. But in any case, TSMC is slightly behind its rivals for the first time in recent memory. TSMC's first high-k/metal-gate offering is slated for the first quarter of 2010. In comparison, IBM's Corp.'s ''fab club,'' including Chartered, IBM and Samsung, is supposed to ship the technology based on 32-nm feature sizes by the second half of 2009. The other big foundry vendor, Taiwan's United Microelectronics Corp. (UMC), has yet to announce its high-k/metal-gate technology. Singapore's Chartered Semiconductor Manufacturing Pte. Ltd. has also tipped its 32- and 28-nm processes--both of which have high-k and metal gates. "I would not say we're behind'' the competition, said John Wei, TSMC's senior director of the Advanced Technology Marketing Division. ''During the course of TSMC's advanced technology development, we concluded that we could now offer our customers a full-node 28-nm process with both high-k/metal-gate and silicon oxynitride at the same time as our competitor's 32-nm,'' Wei said. ''TSMC's 32-nm is re-positioned as a cost-down solution for customer 40-nm products and really does not need high-k/metal-gate,'' he said. ''We are offering customer a choice at'' 28-nm. Still to be seen, however, is whether or not IBM's fab club, TSMC and other foundries can deliver wafers based on high-k and metal gates. The technology is difficult to develop and manufacturer, due in part to integration issues. It makes use of hafnium-based films and metal gates, a huge departure from conventional silicon dioxide materials and polysilicon gates. Today, Intel Corp. is the only chip maker that is shipping products with both high-k and metal gates. It's one thing to ship one type of product--such as an Intel processor--based the technology. On the other hand, foundries must ensure it can process a plethora of different products based on the technology. Demand for high-k is another issue. On the business front, it appears that foundry demand is falling off a cliff. The subprime mortgage crisis, bloated inventories and lackluster demand are casting a shadow over the overall IC business. ''It all looks bad, very bad,'' said Steven Pelayo, an analyst with the Hongkong and Shanghai Banking Corp. Ltd. (HSBC), in a recent report. ''We are hearing of some fabs with a 30 percent month-over-month decline in wafer starts. Companies like TSMC were 100 percent utilized 90 days ago. We now think that they are sub-75 percent in 4Q and potentially even lower in seasonally soft 1Q '09.'' HSBC has lowered its estimates for Chartered, SMIC, TSMC and UMC. TSMC is now projected to earn NT$0.65 ($0.021) a share on sales of NT$67.9 billion ($2.109 billion) for the fourth quarter, compared to NT$0.82 ($0.025) a share on sales of NT$74.9 billion ($2.327 billion) in the original forecast, according to HSBC. For 2008, TSMC's sales are now projected to grow 4 percent over 2007. In the previous forecast, it was originally supposed to grow 6 percent in 2008, according to HSBC. In 2009, TSMC's sales are projected to fall 11 percent, compared to its previous forecast of only a 1 percent decline, according to the firm. With sales of almost $10 billion, TSMC was the leading foundry supplier in 2007, followed in order by UMC, SMIC and Chartered, according to IC Insights Inc. In the foundry market, TSMC hopes to remain the leader in technology. Seeking to stay one step ahead of its rivals, the company in March unveiled what it claimed was the industry's first 40-nm foundry process for leading-edge designs. The technology makes use of 193-nm immersion lithography, copper-interconnects, strained-silicon, low-k and other features. In comparison, UMC is expected to have its 45-/40-nm wafers by year's end. Chartered has been shipping 65-nm technology and is ''engaged with customers'' with its 45- and 40-nm processes, said Walter Ng, vice president of design enablement alliances with Singaporean foundry provider Chartered. At 32-nm, Chartered and its partners, IBM and Samsung Electronics Co. Ltd., will ''be the first -- or one of the first -- to implement high-k and metal gates,'' he said at a recent presentation. During various events, TSMC has presented papers and talked about its 32-nm process, but has yet to announce the technology. Strangely, the company unveiled the details about its 28-nm process even before announcing 32-nm. Perhaps it is downplaying 32-nm, because it won't have high-k ready until the 28-nm node. Slated for shipment by the end of 2009, TSMC's 32-nm process is a 10-layer-metal technology equipped with copper-interconnects, strain-silicon, low-k and other features. Like 45-nm, TSMC is using 193-nm immersion scanners from its main supplier--ASML Holding NV. At 45-/40-nm, TSMC's low-k technology has a ''k'' rating of 2.5. For low-k, it is reportedly using Applied Material Inc.'s Black Diamond films, which are deployed via a chemical vapor deposition (CVD) process. At 32-nm, TSMC's low-k technology is rated below 2.5. The company declined to comment on whether it is still using Black Diamond for 32-nm. Like 45-/40-nm, TSMC will continue to use and extend silicon dioxide for the gate stack at 32-nm. For 32-nm, SiON is a safer bet and the vast majority of devices will not require a high-k/metal-gate duo, Wei said. SiON ''has a clear position in the market," he said. "It's a lower risk technology." After 32-nm, TSMC will move into the 28-nm era. Like the 32-nm node, the 28-nm technology will make use of 193-nm immersion lithography, copper interconnects, low-k and strained-silicon. The company declined to comment on the ''k'' value of its low-k process, nor would it provide any details about its high-k and metal-gate technology. According to TSMC's roadmap, the company offers two major processes at the high-end: low-power and high-performance. On the high-performance front, the company is shipping a 40-nm process, with the 32-nm (CLN32G) technology due out in the fourth quarter of 2009. The 28-nm high-performance technology (CLN28HP) will move into production in the first half of 2010, according to TSMC's roadmap. At present, TSMC is said to be shipping a 40-nm low-power (CLN40LP) process. At the beginning of 2009, it will offer a low-power, general-purpose version of 40-nm (CLN40LPG). However, it will not offer a low-power, 32-nm process. On the low-power front, it will skip that node and instead offer a 28-nm version of its low-power, high-performance process (CLN28LPT). Slated to go into production at the beginning of 2010, this process is said to provide twice the gate density, 50 percent more speed and 30-to-50 percent lower power consumption than TSMC's 40-nm low-power process. TSMC's 28-nm high-performance process is geared for microprocessors, graphics chips, FPGAs and related high-end products, Wei said. Its 28-nm low-power process is aimed for wireless, portable and related devices, he added. The company will begin offer its prototyping CyberShuttle service for the 28-nm node by the end of 2008. http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=210604347 --

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