剩下的: Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits A Methodology for Validation of Microprocessors Using Hybrid techniques Arbitrary On-Chip Networks Design with Source Routing Switches Incremental Circuit Simulation based on the Reinforced Selective-tracing Waveform Relaxation Algorithm Electrical Modeling and Signal Integrity Simulation of Loadboard for high-speed BGA package Testing ------------- bluetai: unisun: (1) Tapping Point Numerical Search for Exact Zero-Skew RLC Clock Tree Construction athena: (1) Floorplanning Multiple Reticles for Multi-project Wafers -------------- crazying: (1) Computing Control Inputs in Open Systems using SAT (2) Optimal Design Of CMOS LNA using Multi Objective Genetic Algorithm donnie: (1) A VLSI LAYOUT LEGALIZATION TECHNIQUE BASED ON A GRAPH FIXING ALGORITHM (2) “Kreatur” A UML2SpecC Translator gwliao: (1) Leakage and Dynamic Power Reduction for DFT Circuits Operating in Normal Mode (2) Design of Low-Power CMOS Op-Amps Via Non-Convex Polynomial Optimization nextme: (1) A Partition-Based Voltage Scaling Algorithm Using Dual Supply Voltages for Low Power Designs (2) Fast and Accurate Peak Power Estimation Through Mixed-Level Delay Calibration --------- Jiawei: Design Migration from Peripheral ASIC Design to Aera-IO Flip-Chip Design by Chip I/O Planning and Legalization waves: The Fast and Accurate Worst-Case Determination with Maximum Probability fish: A Comparative Study of Lukes Algorithm and Modified Lukes Algorithm for Partitioning of Trees Mark: A Novel Heuristic for Constructing Hexagonal Steiner Trees for Routing in VLSI -------- meifc: Improving Single-Pass Redundancy Addition and Removal internal: gain-based cell delay modeling Tien-Chang Hsu: Multilevel Large-Scale Modules Placement with Refined Neighborhood Exchange anna: Speeding Up Static Timing Analysis With Crosstalk: Discrete Coupling Model Centric Approach -------- enorm: Formal Presentation of Two Initial Variable Ordering indark: Investigation of dynamic power consumption reduction in FPGAs Akilae: Automatic Low Power Optimizations during ADL-driven ASIP Design jinli: A Linear Time Complexity Current Path Analysis Algorithm for ESD Protection hyliu: Modified Simulated Annealing Algorithm for Large Temperature Set Applications – Simulation of VLSI Floor Planning System arious: ?????? --

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