※ 引述《anna0466 (:))》之銘言： 大家自己列上來吧 meifc: Improving Single-Pass Redundancy Addition and Removal wi enorm: (志願1) Formal Presentation of Two Initial Variable Ordering (志願2) A Novel Heuristic for Constructing Hexagonal Steiner Trees for Routing in VLSI jinli or hyliu: A Linear Time Complexity Current Path Analysis Algorithm for ESD Protection nextme: 1. A Partition-Based Voltage Scaling Algorithm Using Dual Supply Voltages for Low Power Designs 2. Improving Single-Pass Redundancy Addition and Removal with Inconsistent Assignments 3. Gain-based Cell Delay Modeling 4. Fast and Accurate Peak Power Estimation Through Mixed-Level Delay Calibration Jiawei: Design Migration from Peripheral ASIC Design to Aera-IO Flip-Chip Design by Chip I/O Planning and Legalization internal gain-based cell delay modeling indark: 1. Investigation of dynamic power consumption reduction in FPGAs 2. Multilevel Large-Scale Modules Placement with Refined Neighborhood Exchange 3. Design Migration from Peripheral ASIC Design to Area-IO Flip-Chip Design by Chip I/O Planning and Legalization Tien-Chang Hsu 志願 1. Multilevel Large-Scale Modules Placement with Refined Neighborhood Exchange 2. Design Migration from Peripheral ASIC Design to Aera-IO Flip-Chip Design by Chip I/O Planning and Legalization waves: 1. The Fast and Accurate Worst-Case Determination with Maximum Probability 2. Speeding Up Static Timing Analysis With Crosstalk: Discrete Coupling Model Centric Approach 阿諾 你要第一篇嗎? anna: 同波波XD 好像只有這兩篇跟ssta有一滴滴關係orz 我兩篇priority都一樣 妳想看第一篇的話我就第二篇囉~~^^ Akilae: 1. A Partition-Based Voltage Scaling Algorithm Using Dual Supply Voltages for Low Power Designs -- 跟nextme 衝到了.. (￣□￣|||)a --

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