課程名稱︰邏輯電路 課程性質︰工程科學及海洋工程學系 必修 課程教師︰吳文中 開課學院：工學院 開課系所︰工程科學及海洋工程學系 考試日期（年月日）︰2009/11/10 考試時限（分鐘）：150分鐘 是否需發放獎勵金：是 （如未明確表示，則不予發放） 試題 : 1.(1)State the addition rule and substation rule of BCD numbers,and show 3 examples to test the rules you stated respectively and explain the reason for the extra step performed on the BCD addition and subtraction rules you stated compared with ordinary binary addition and subtraction.(6pts) (2)Show that two's complement number can be converted to a representation with fewer bits by removing identical higher bits. That is, given an n-bit two's complement number X, show that the m-bit two's-complement number Y obtained by discarding the d leftmost bits of X represent the same number as X if and only if the discarded bits all equal the sign bit of Y.(7pts) (3)For signed number schemes,sign-magnitude,1's complement,and 2's complement, which one is adapted in nowadays computer system? State the advantages of this scheme compared with the other two.(7pts) 2.(1)Use the theorems of switching algebra and generalized DeMorgan's theorem to prove consensus theorem(T11)and(T11').(hint:XY+XY'=X,combing theorem)(10pts) (T11) XY+X'Z+YZ=XY+X'Z; (T11') (X+Y)(X'+Z)(Y+Z)=(X+Y)(X'+Z) (2)Prove algebraically(10pts) (a) (A'+E)(B+E)(C+E)(A'+F+D)(B+F+D)(C+F+D)=A'BC+EF+DEF' (b) WX+WY'X+ZYX=X(W+Z)(W+Y) 3.(1)Convert (A'+B+C')(A'+C'+D)(B'+D') into sum of product term form "algebraically".(7pts) (2)Write the true table of the login function in (1) in Σ notation.(6pts) (3)Using karnaugh map to find the minimal sum of product of the logic function.(7pts) 4.Construct a 4bit BCD prime number detector, which will output 1 for prime numbers and 0 otherwise. (1)Write the truth table and canonical sum of the corresponded logic function.(6pts) (2)Using Karnaugh map to find minimal sum of the corresponded logic function.(7pts) (3)Draw the gate level circuit of the minimal product function you obtained.(7pts) 5.Construct a logic circuit which detects 4-bit even number in binary coding, the circuit will output 1 for even numbers and 0 otherwise. (1)Write the truth table and canonical sum of the corresponded logic function.(5pts) (2)Using Karnaugh map to find minimal sum of the corresponded logic function.(5pts) (3)Draw the gate level circuit of the minimal sum function you obtained.(5pts) (4)Is there other simplified implantation of the circuit other than ordinary two-level and-or circuit? Draw the schematic for the alternate implantation. (5pts) --

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