作者flarexx (...)
看板Grad-ProbAsk
標題[理工] 邏輯設計的問題
時間Fri Mar 27 15:43:03 2009
Design a timing circuit which provides an output signal
that stays on for exactly eight clock cycles.A start signal sends
the output to the 1 state, and after eight clock cycles the signal
returns to the 0 state.
有人知道這題的邏輯電路怎麼畫嗎?? 感謝..
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