作者c871111116 (文子水交)
看板Programming
标题[问题] verilog烧FPGA板out of range
时间Tue Jun 19 22:14:08 2012
刚刚写了一个程式
总之就是用verilog然後连VGA到萤幕画图
可是不知道怎麽写的
我烧到板子後萤幕出来的就是"out of range"这三个字一直跳动
可以请问一下这是什麽问题吗
顺便附上我的vga_control code
module VGA_control(
input clk,
input reset,
output reg[10:0] vcounter,
output reg[11:0] hcounter,
output reg visible,
output reg oHS,
output reg oVS
);
always @ (posedge clk or posedge reset) begin
if(reset) begin
hcounter<=0;
vcounter<=0;
end
else begin
hcounter<=hcounter+1;
if(hcounter==11'd800) begin
hcounter<=0;
vcounter<=vcounter+1;
end
if(vcounter==10'd525) begin
vcounter<=0;
end
end
end
always @ (posedge clk or posedge reset) begin
if(reset) begin
visible<=0;
oHS<=0;
oVS<=0;
end
else begin
if(hcounter>=11'd0 & hcounter<11'd640 & vcounter>=10'd0 &
vcounter<10'd480) begin
visible<=1;
end
else begin
visible<=0;
end
if(hcounter>=11'd656 & hcounter<11'd752) begin
oHS<=0;
end
else begin
oHS<=1;
end
if(vcounter>=10'd490 & vcounter<10'd492) begin
oVS<=0;
end
else begin
oVS<=1;
end
end
end
endmodule
--
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◆ From: 140.113.65.154
1F：→ MOONRAKER:这不用玩过FPGA也知道吧 218.160.177.60 06/19 22:17
2F：→ MOONRAKER:out of range表示(1)输入信号扫描频率超 218.160.177.60 06/19 22:17
3F：→ MOONRAKER:过萤幕极限(2)**根本没讯号** 218.160.177.60 06/19 22:18
4F：→ MOONRAKER:不信你把你萤幕讯号线拔掉就是这样 218.160.177.60 06/19 22:19
5F：→ MOONRAKER:赶快拿示波器接VGA头看一看吧 218.160.177.60 06/19 22:19
6F：→ MOONRAKER:接哪几头你会比我清楚 218.160.177.60 06/19 22:19