作者JasonZZZ (吃吃吃)
看板Oversea_Job
标题[北美] Job open: Design Verification Engr
时间Fri Nov 4 10:17:24 2011
请在美国当地的朋友寄email来就可以了
从台湾寄来的除非你本人正在美国
不然我老板应该是不会出国际机票的
Job Title
Design Verification Engineer – Entry Level
Job Description
In this position, the individual will participate in the logic design
and verification of NAND Flash memory products.
Main responsibilities include:
- Development of SystemVerilog TestBench for NAND Flash chips
- Full-chip verification on Flash memory projects with SVTB.
Other responsibilities include:
- Support of SystemVerilog Assertion
- Behavioral modeling in SystemC and C++
- Support of design and verification methodology enhancements
Job Qualification:
Recent or Dec. 2011 graduation with one of following qualifications:
- MS EE with logic design Verilog RTL focus; as well as C++ knowledge
- MS CS/CE with strong C++ skills; as well as knowledge in Verilog &
logic design
Job Location Milpitas, CA
SanDisk Corporation
SanDisk is the world's largest supplier of innovative flash memory data
storage products and we offers a highly competitive compensation package
and great benefits, which include Stock Options, ESPP, matched 401 (K),
comprehensive insurance and tuition reimbursement.
SanDisk is an equal opportunity employer.
please email your resume to:
[email protected]
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※ 发信站: 批踢踢实业坊(ptt.cc)
◆ From: 63.163.107.100
1F:推 ccchen:只找 entry level 的吗?有朋友多年经验想找 11/04 10:47
2F:→ TripleC:之前原po在版上找过很多次senior的哦 11/04 12:01
3F:→ JasonZZZ:有多年经验的也在找 请欢迎转寄 11/04 13:29
4F:推 yohowo:贵公司缺这麽大阿..好常找人殴 11/04 14:04
5F:→ JasonZZZ:verification的似乎不太好找,刚好team又要扩大 11/05 01:15
6F:推 ccchen:最近业界找 verification 的比 design 多不少 11/05 03:35
7F:→ blackacre:Verification是永远不会失业的 11/05 05:18
8F:→ TripleC:verification面对的是印度大军吧... 11/05 10:01