作者ccchen (作业作业作业.....)
看板Oversea_Job
标题[北美] verification engineer @ Xilinx
时间Tue Mar 29 15:50:10 2011
这是帮朋友 po 的
请直接联络他，谢谢
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请寄 resume 到
[email protected]
Verification Engineer
Detailed Description
Xilinx SerDes technology group is looking for a verification engineer.
The individual will help design and develop simulation
and verification environments to prove the correctness of SerDes designs.
Job Requirements
-M.S. or Ph.D. in EE, CS or CE
-Good knowledge in RTL and VLSI circuit designs
-Familiarity with OOP coding experience (System Verilog, Vera, or C++)
-Strong background in software
-Experience with OVM, VMM, or RVM is plus
-Experience with mixed-signal verification tool and methodology (CoSim/Nanosim) is a plus
-Good communication skills
-Strong understanding of all phase of ASIC and/or
full custom chip development is encouraged
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