请实验室各位明天参加 Low-Power VLSI Design 的演讲 演讲资讯如下: Title: Low-Power VLSI Design Speaker: Dr. Pei-Hsin Ho, Fellow of Synopsys Inc. Time: 11:00am-12:00pm, August 17 (Monday) Place: NTU EE BL 114 Abstract: Power is the number one concern for consumer electronics ICs as well as high-performance microprocessors. In this talk I will give an overview to state-of-the-art low-power design strategies. Bio: Pei-Hsin Ho is a Synopsys Fellow with Synopsys. Since 2004, he has been working on physical design and logic synthesis technologies for low-power SoCs. From 1998 to 2003, he was creating Synopsys' formal property verification tool Magellan. From 1995 to 1998, he was with Intel Strategic CAD Labs. Pei-Hsin received his Ph.D. and M.S. degrees in C.S. from Cornell University. He has been issued 5 US patents and published more than 20 technical papers, including receiving a Best Paper Award from DAC. --

※ 发信站: 批踢踢实业坊(ptt.cc) ◆ From: 218.166.145.194