Delays seen in 32-/28-nm era, says Synopsys CEO Mark LaPedus EE Times (01/15/2009 5:03 H EST) HALF MOON BAY, Calif. -- Economic factors could delay IC designs based on next-generation, 32-/28-nm processes and the industry could get stuck on that technology for some time, according to the top executive from Synopsys Inc. For years, leading-edge process technology has followed a two-year cycle. But based on the current inputs of tape-out activity, the 32-/28-nm era could be delayed ''one or two quarters,'' said Aart de Geus, chairman and CEO of Synopsys (Mountain View, Calif.). Those nodes represent a ''resting point'' for the IC industry, he said during a presentation at the Industry Strategy Symposium (ISS) here. This implies that the two-year process technology cycle could slow down, and, in effect, the 22-nm era would get pushed out. "Delay is not the right word,'' he said during a question and answer session. ''The curve will simply slow down by a couple of quarters.'' For some time, many have feared that the two-year process cycle will slow, thanks to soaring design and chip-production costs. The vast majority of chip makers could also step on the process technology brakes amid the current and deep downturn. There are no plans to slow down at two chip makers: Intel Corp. and Qualcomm Inc. ''Intel is committed to the two-year cadence,'' said Steve Johnston, director of supplier technology integration for the Technology Manufacturing and Engineering Group at Intel Corp. (Santa Clara, Calif.), during a presentation at ISS. ''I'm driving like a freight train to 28-nm,'' said Jim Clifford, senior vice president and general manager of Qualcomm CDMA Technologies, at ISS. At present, Qualcomm (San Diego) is in initial production of an undisclosed 45-nm device. But like most cell-phone chip makers, the company is attempting to squeeze more functions on the IC. The 45-nm cell-phone devices ''are too big,'' prompting the need for next-generation processes like 28-nm, he said. While the die shrink makes sense, Clifford questions whether the shift towards 28-nm technology will provide the traditional cost-reduction benefits. For years, the shift towards the next process provides a 29 percent cost reduction. Will 28-nm provide the same benefit? ''I don't know,'' said Clifford, who also questions whether the 28-nm process roll out among the foundries will be on time. ''Is it really going to be Q2 2010?'' Fabless Qualcomm uses several foundries, including TSMC, IBM's fab club and others. On the foundry side, silicon foundry giant Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) late last year moved its 40-nm process into volume production. Who's the process leader? TSMC's 32-nm process is slated for shipment by the end of 2009. TSMC's first high-k/metal-gate offering, which is a 28-nm process, is slated for the first quarter of 2010. In comparison, IBM's Corp.'s ''fab club,'' including Chartered, IBM and Samsung, is supposed to ship the high-k technology based on 32-nm feature sizes by the second half of 2009. Intel, considered the leader in logic process technology, is on track for 32-nm production readiness in Q4 2009. For some time, Intel has been shipping 45-nm designs based on a high-k/metal-gate scheme. In NAND, the Micron/Intel duo is leading the charge, as the companies are shipping 34-nm parts. Seeking to take the technology lead in NAND flash, SanDisk Corp. disclosed that it will roll out 32-nm devices in 2009. SanDisk's partner, Toshiba Corp., will also reportedly roll out 32-nm NAND chips in the later part of 2009. http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=212900825 -- ◣ ◢ .. ◥S --

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