※ [本文转录自 NTUGIEE_ric 看板] 作者: ric2k1 (Ric) 看板: NTUGIEE_ric 标题: Re: [动员令] 12/27 (三) Prof. Sakallah's talk 时间: Mon Dec 25 22:19:18 2006 听过 GRASP, MINCE, AMUSE, Satire, PBS, Peublo... 吗 ? 没错, 这些知名的 tools 都是由 Prof. Sakallah 的实验室出来的, 所以他的演讲必定不可错过!! 有上 Testing 课的同学也可以来听喔~~~ 有跟李建模老师协调过了, 星期三的课将会以 ICS 组的同学的专长为主... 早上 9 点开始演讲!!!! 请提早入场!!!! 地点: BL 201 ※ 引述《ric2k1 (Ric)》之铭言： 大师参访, 老师负责接待, 学生务必要早起听演讲 !!!! 不知道他是谁, google 一下吧... (听说下学期还有 Prof. Sharad Malik...) ----- Satisfiability and Design Verification Boolean satisfiability (SAT) solvers are playing an increasingly larger role in the verification step of the hardware design process. This is primarily due to the tremendous progress in their performance and capacity over the last ten years. In this tutorial, I will cover the basics of SAT solving, and illustrate the use of scalable Boolean reasoning in an abstraction-based microprocessor verification system. Time permitting, I will touch upon satisfiability modulo theories (SMT) which augments Boolean SAT with more expressive constraints leading to further improvements in performance and scale. Bio: Karem A. Sakallah (S'76-M'81-SM'92-F'98) received the B.E. degree in electrical engineering from the American University of Beirut, Beirut, Lebanon, in 1975, and the M.S.E.E. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University, Pittsburgh, PA, in 1977 and 1981, respectively. In 1981, he was with the Department of Electrical Engineering at Carnegie Mellon University as a Visiting Assistant Professor. From 1982 to 1988, he was with the Semiconductor Engineering Computer-Aided Design Group at Digital Equipment Corporation in Hudson, MA, where he headed the Analysis and Simulation Advanced Development Team. Since September 1988, he has been with the University of Michigan, Ann Arbor, as a Professor of Electrical Engineering and Computer Science. From September 1994 to March 1995, he was with the Cadence Berkeley Laboratory in Berkeley, CA, on a six-month sabbatical leave. He has authored or coauthored more than 200 papers and has presented seminars and tutorials at many professional meetings and various industrial sites. His current research interests include the area of computer-aided design with emphasis on logic and layout synthesis, Boolean satisfiability, discrete optimization, and hardware and software verification. Dr. Sakallah was an Associate Editor of the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS from 1995 to 1997 and has served on the program committees of the International Conference on Computer-Aided Design, Design Automation Conference, and the International Conference of Computer Design as well as numerous other workshops. He is currently an Associate Editor of the IEEE TRANSACTIONS ON COMPUTERS. He is a fellow of the IEEE and a member of the ACM and Sigma Xi. --

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