作者indark (The Lord Bless You)
看板NTUGIEE_EDA
标题Re: paper review
时间Mon Nov 14 16:04:24 2005
※ 引述《internal ()》之铭言：
※ 引述《Jarwai (冷淡看一切...)》之铭言：
※ 引述《nextme (^^ 嘿嘿嘿)》之铭言：
: ※ 引述《Donnie ( XD)》之铭言：
: ※ 引述《enorm (give and believe)》之铭言：
: 大家自己列上来吧
: meifc: Improving Single-Pass Redundancy Addition and Removal wi
: enorm: (志愿1) Formal Presentation of Two Initial Variable Ordering
: (志愿2) A Novel Heuristic for Constructing Hexagonal Steiner
: Trees for Routing in VLSI
: jinli or hyliu: A Linear Time Complexity Current Path Analysis
: Algorithm for ESD Protection
: nextme:
: 1. A Partition-Based Voltage Scaling Algorithm Using Dual Supply
: Voltages for Low Power Designs
: 2. Improving Single-Pass Redundancy Addition and Removal with
: Inconsistent Assignments
: 3. Gain-based Cell Delay Modeling
: 4. Fast and Accurate Peak Power Estimation Through Mixed-Level
: Delay Calibration
Jiawei:
Design Migration from Peripheral ASIC Design
to Aera-IO Flip-Chip Design by Chip I/O Planning and Legalization
internal gain-based cell delay modeling
indark:
1. Investigation of dynamic power consumption reduction in FPGAs
2. Multilevel Large-Scale Modules Placement with Refined Neighborhood Exchange
3. Design Migration from Peripheral ASIC Design to Area-IO Flip-Chip Design by Chip I/O Planning and Legalization
好像抢到婉萍的志愿了 sorry~~
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1F：→ Jarwai:我要11月23号报告...因为30号我要OR期中考... Orz 11/14 15:16
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