A serial two,s complementer is to be designed. A binary integer of arbitrary length is presented to the serial two,s complementer,least significant bit first, on input X.When a given bit is presented on input X,the corresponding output bit is to appear during the same clock cycle on output Z.To indicate that a sequence is complete and that the circuit is to be initialized to receive another sequence,input Y becomes 1 for one clock cycle.Otherwise, Y is 0. Find the state table for the serial two,s complementer? present state input next state output Q(t) X , Y Q(t+1) Z 0 0 0 0 0 0 0 1 0 X 0 1 0 1 1 0 1 1 0 X 1 0 0 1 1 1 0 1 0 X 1 1 0 1 0 1 1 1 0 X Q(t+1)和 Z 是怎麽判断出来的阿 ?? 救一下阿?? --

※ 发信站: 批踢踢实业坊(ptt.cc) ◆ From: 218.174.161.206