※ [本文转录自 NTUEE107 看板] 作者: PIEPIE () 看板: NTUEE107 标题: [公告]国内外名师云集的高等积体电路课程 时间: Sat Sep 15 14:09:08 2007 各位电机系的同学，这学期大家有福了， 本学期电资学院电子所极为荣幸邀请到两位国际知名IEEE Fellow教授到 台大客座研究：一位是University of Wisconsin - Madison胡玉衡教授 一位是University of Illinois at Urbana-Champaign 的Prof. Naresh Shanbhag。 Bio of Prof. Hu: http://www.engr.wisc.edu/ece/faculty/hu_yu.html Bio of Prof. Shanbhag: http://icims.csl.uiuc.edu/~shanbhag/myhome/ 两位教授在先进的VLSI技术方面都有卓越前瞻的研究，故拟新增”高等积体电路” ，除了授课教师介绍各式先进的VLSI技术之外，更可把握难得的机会，於课程中安 排两位客座教授的Invite talk（共十周），藉以让本校师生能够了解高等积体电路设 计方面的前瞻性研究趋势。 另外，目前得知密西根大学（University of Michigan, Ann Arbor）的Prof.Igor Markov 也会给予一次的invite talk。 除了上述三名知名的国外教授给予授课之外，阙志达教授、吴安宇教授、 简韶教逸教授和、卢奕璋教授将就VLSI在各领域的先进技术做探讨。 若是对此门课程有兴趣的同学，请加选此门课程，别在犹豫了，这是千载难逢的好机会。 以下将对Prof. Shanbhag的六周课程作讲解，（其余老师的课程细目尚未确定）。 Prof. Shanbhag 将会花六周的时间进行一系列课程，上课将采用国外大学的模式 ，两小时的课程和一小时的小组讨论，Prof. Shanbhag相当喜欢在课程中跟学生讨论， 他非常期待跟台湾一流的学生做交流，也希望能有些好的想法能留在台湾，因此， 希望各位同学能踊跃参与。 这六周将讲解在未来VLSI的世界里会遇到什麽瓶颈，并且该怎麽从circuit、architecture 和algorithm去解决 以下是这六周的课程纲要： General Description: This graduate-level lecture series will focus on issues in the design and implementation of robust digital integrated circuits and systems. The series will begin with an overview of nanometer non-idealities that have emerged in recent years and the relationship between energy-efficiency/power and reliability. This will be followed by discussion of noise-tolerant circuit design techniques. A communications-inspired view of reliable and energy-efficient SOC design will be the focus of the remainder of this lecture series. Appropriate background material basics of communication techniques and adaptive/statistical signal processing techniques will be provided. A reading list will be provided. Students will be expected to make presentations during part of the lecture and engage in discussions. Three small (mini)-projects will be provided for students to obtain hands-on experience with the material taught in class. 1. Non-idealities in nanometer process technologies 2. Noise-tolerant digital integrated circuit design 3. Communications-inspired IC Design I: Low-power bus coding 4. Communications-inspired IC Design II: Algorithmic Noise-Tolerance (ANT) 5. Communications-inspired IC Design III: Predictor-based ANT 6. Communications-inspired IC Design III: Algorithmic Soft-error Tolerance --

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