作者mnstar (挥别了 我的朋友)
看板NTUEE101
标题[情报] Upcoming IEEE Short Course on Fractional-N PLL design
时间Mon Mar 7 13:18:37 2005
Dear Sir/Madam,
The IEEE SSCS Taipei Chapter has invited Professor Michael Perrott of
MIT to give a short course in Hsinchu (NCTU) and Taipei (NTU) on March
28th and 29th, respectively. Please see below or the attached files
for further
information. To take advantage of a lowered registration fee, please
register and send your payment before March 18.
SSCS Taipei Chapter
----------- IEEE SSCS Taipei Chapter Short Course -----------
"Design, Simulation, and Bandwidth Extension Methods for Fractional-N
Frequency Synthesizers"
Michael Perrott, Assistant Professor, MIT
场次
<第一场> 国立交通大学光复校区电子与资讯大楼国际会议厅
3月28日(星期一) 9:30~12:00,14:00~16:30
<第二场> 国立台湾大学应用力学馆国际会议厅
3月29日(星期二) 9:30~12:00,14:00~16:30
报名方式 一律上网报名 (
http://powereric.ee.ntu.edu.tw/~sscs/lectures)
报名费用 (含讲义、午餐及点心,恕不退费)
IEEE Member Non-IEEE Member
业界 3/18 前 3500 4500
3/18 後 4500 5500
教师 3/18 前 1000 1500
3/18 後 1500 2000
学生 500 1000
缴费方式
(1) 请将支票或汇票挂号寄到『10617台北市大安区罗斯福路四段一号 国立台湾大学电机二馆348室 李孋伦小姐收』。
(2) 支票或汇票抬头『李孋伦』。
(3) 请在支票或汇票背面用铅笔注明『单位』、『姓名』及『报名序号』。
(4) 欲享有提早报名优惠者,请务必於3月18日前将支票或汇票寄达。
洽询办法
(1) 电话: (02)2363-5251 ext.367,李孋伦小姐。
(2) Email:
[email protected]
主办单位 IEEE SSCS Taipei Chapter
协办单位 国立台湾大学电子工程研究所
台大系统晶片中心
课程大纲
An outline of the course is as follows. The first two hours will focus on the
simpler integer-N synthesizer structure with respect to basics of its
operation,
modeling, design at the system level, and noise analysis. With the integer-N
background in place, the remaining 3 hours will focus on the fractional-N
synthesizer structure with respect to basics of its operation, modeling,
design,
behavioral simulation, noise analysis, and bandwidth extension techniques. In
particular, the topic of bandwidth extension will be examined through
presentation of a new fractional-N architecture that utilizes a newly proposed
quantization noise cancellation method to increase the PLL bandwidth by a
factor
of ten while maintaining excellent noise performance. Calculated, simulated,
and measured results of a custom 0.18贡m CMOS integrated circuit will be
compared to give a sense of the accuracy of the design and simulation methods
and the viability of the architectural approach. Applications of fractional-N
synthesizers within GMSK modulators and clock and data recovery circuits will
then be covered, and then the course will wrap up with a brief discussion of
future research directions.
主讲人简介
Michael H. Perrott received the B.S. degree in Electrical Engineering from New
Mexico State University, Las Cruces, NM in 1988, and the M.S. and Ph.D.
degrees
in Electrical Engineering and Computer Science from Massachusetts Institute of
Technology in 1992 and 1997, respectively. From 1997 to 1998, he worked at
Hewlett-Packard Laboratories in Palo Alto, CA, on high speed circuit
techniques
for Sigma-Delta synthesizers. In 1999, he was a visiting Assistant
Professor at
the Hong Kong University of Science and Technology, and taught a course on the
theory and implementation of frequency synthesizers. From 1999 to 2001, he
worked at Silicon Laboratories in Austin, TX, and developed circuit and signal
processing techniques to achieve high performance clock and data recovery
circuits. He is currently an Assistant Professor in Electrical Engineering and
Computer Science at the Massachusetts Institute of Technology, and focuses on
high speed circuit and signal processing techniques for data links and
wireless
applications. (
http://www-mtl.mit.edu/~perrott)
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