作者luckyburgess (心安即自在)
看板Grad-ProbAsk
标题[理工] [计组]-成大96-资工系
时间Mon Feb 8 00:53:20 2010
Consider a MIPS processor with an additional floating point unit. Assume
functional unit delays in the processor are as follows: memory (2 ns),
ALU and adders (2 ns), FPU add (8 ns), FPU multiply (16 ns),
register file access (1 ns), and the remaining units (0 ns).
Also assume instruction mix as follows: loads (31 %), stores (21%),
R-format instructions (27%), branches (5%), jumps (2%), FP adds
and subtracts (7%). and FP multiplys and divides (7%).
(1) What is the delay in nanosecond to execute a load, store, R-format,
branch, jump, FP add/subtract, and FP multiply/divide instruction in a
single-cycle MIPS design?
(2) What is the averaged delay in nanosecond to execute a load, store,
R-format, branch,jump,FP add/subtract, and FP multiply/divide instruction
in a multicycle MIPS design?
想请问一下第二小题，我的想法是直接算
8*31%+7*21%+6*27%+5*5%+2*2%+12*7%+20*7%=8ns
但手边的答案好像是先求得最大clock cycle time=16ns
再算平均CPI=5*31%+4*21%+4*27%+3*5%+3*2%+4*7%+4*7%=4.24
最後平均delay=4.24*16ns=67.84ns
有高手可以帮我解释一下题意吗?? 感恩了!!
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1F：推 luckysky1:multicycle 每段时间要一样 02/08 07:58
2F：推 crazyjoe:multiycle是以unit time最大的当cycle time 02/08 19:57
3F：→ crazyjoe:再看全部需要几个cycle，相乘就是 02/08 19:58
4F：→ luckyburgess:恩恩 我了解了 感谢!! 02/09 00:03
5F：→ t970320:想问一下jump的cpij为什麽是3 不是只有IF吗? 02/17 16:37