作者bernachom (Terry)
看板Grad-ProbAsk
标题[问题] 计组－管线指令
时间Sat May 9 00:54:36 2009
请教一下
Schedule the following instruction segment into a superscaler
pipeline for MIPS. Assume that the pipeline can execute one ALU Or
branch instruction and one data transfer instruction concurrently.
For the best, the instruction segment can be executed in four clock
cycles. Fill in the instruction identifiers into the table.
NOte that data dependency should be taken into account.
(Identifier) (Instruction)
In-1 loop: lw $t0.0($1)
In-2 addu $t0.$t0.$s2
In-3 sw $t0.0($1)
In-4 addi $s1.$s1,-4
In-5 bne $s1.$zero.Loop
＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿
▕clock ▕ alu or branch instruction ▕data transfer instruction ▕
▕＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿
▕1＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕
▕2＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕
▕3＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕
▕4＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕＿＿＿＿＿＿＿＿＿＿＿＿＿＿▕
表格我尽力了...不会画...
麻烦了，谢谢
--
※ 发信站: 批踢踢实业坊(ptt.cc)
◆ From: 61.228.97.36
※ 编辑: bernachom 来自: 61.228.97.36 (05/09 00:55)
1F：→ uminchu185: lw $t0,0($1) 05/09 10:05
2F：→ uminchu185:addi,$s1,$s1,-4 05/09 10:06
3F：→ uminchu185:addu $t0,$t0,$s2 05/09 10:06
4F：→ uminchu185:bne $s1,$0,Loop sw $t0,4($s1) 05/09 10:08
5F：→ uminchu185:I4往前移消除hazard,因此I3的参考位址需加4 05/09 10:15
6F：→ bernachom:谢谢您^^ 05/09 14:30
7F：推 whisp1222:楼上要不要找人一起念 一起念有问题才能互相讨论 否则你 05/09 17:19
8F：→ whisp1222:光打字就打很久吧 而且有朋友一起念比较久 05/09 17:20
9F：→ icrts:比如说楼上就不错喔 XD 05/09 21:32
10F：→ bernachom:有在想啦，不过目前先把底子加强一下，谢谢各位噜^^ 05/09 23:31