作者darvishyu56 (darvishyu)
看板Grad-ProbAsk
标题[问题] 97中正电机计组
时间Tue Mar 24 12:04:15 2009
2.Consider a program with the fpllowing instruction mix:
instruction type frequency
Load 25%
Store 15%
Branch 20%
ALU 40%
suppose any miss will cause a stall, please compute the CPI of this program
running on a pipelined machine with no instruction cache misses, no hazards,
a 98% data cache hit rate, and a miss penalty of 50 clock cycles.
no instruction cache misses,no hazards
这样CPI是多少?1吗?
data cache miss rate=2%
CPI=1+0.02*(0.25+0.15)*50=1.4
有错请指正
4.Suppose a machine uses 32-bit physical address
If we consider a 2 way set-associative cache with 10 bit cache index and
32-byte cache blocks.
please calculate:
(a)The number of blocks in the cache.
(b)The size of the block offset.
(c)The size of the tag.
我的答案是
tag=17 bit index=10 bit block offset=5 bit
(a)2048
(b)2048* 5 bit=10240 bit
(c)2048*17 bit=34816 bit
有错请指正
谢谢
另外 有第五题的答案吗?
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◆ From: 218.175.169.105
※ 编辑: darvishyu56 来自: 218.175.169.105 (03/24 12:08)
1F：推 jim76514:我写block offset=3bit tag=17bit index=10bit 03/24 22:41
2F：→ jim76514:不知对不对... 03/24 22:41
3F：推 jim76514:abstraction layer 那题是什麽? 03/24 22:47
4F：推 clive1228:totalCPI = baseCPI + memory-stall cycle per inst. 03/26 23:12