作者SiriusJinn (假斯汀)
看板Electronics
标题[问题] modelsim模拟问题
时间Sun Nov 2 01:40:43 2008
刚随便找了个别人打好的verilog档
用modelsim读进去
compiler成功
但simulation失败
想知道问题出在哪
# Compile of c432.v was successful.
Modelsim> vsim work.c432
# vsim work.c432
# ** Note: (vsim-3812) Design is being optimized...
# ** Error: C:/c432.v(31): Module 'inv_1' is not defined.
# ** Error: C:/c432.v(32): Module 'inv_1' is not defined.
# ** Error: C:/c432.v(33): Module 'inv_1' is not defined.
# ** Error: C:/c432.v(34): Module 'inv_1' is not defined.
.
.
.(太多了省略一些)
.
.
# ** Error: C:/c432.v(187): Module 'nand4_1' is not defined.
# ** Error: C:/c432.v(188): Module 'nand4_1' is not defined.
# ** Error: C:/c432.v(189): Module 'nand4_1' is not defined.
# ** Error: C:/c432.v(190): Module 'nand4_1' is not defined.
# Optimization failed
# Error loading design
总觉得是少了点东西
是没有给它 cell library 吗？
顺便问一下将 sdf 档一起载入的话
波形会有差吗？
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1F：推 arclitetank:1.对 2.是 11/02 01:42
2F：→ SiriusJinn:那这些东西可以自已定义吗？还是一定要拿到0.18的资料 11/02 01:46
3F：→ sasako:应该是没有把module一起丢进去做compile.. 11/02 01:52
4F：→ sasako:而且他已经跟你说第几行有问题 就去check一下罗.. 11/02 01:52
5F：→ SiriusJinn:module是制程资料吧？error几乎是从头错到尾.... 11/02 02:03
6F：推 zxvc:你的c432.v有去call inv_1、nand4_1这些modules，但ModelSim 11/02 07:16
7F：→ zxvc:找不到。另外compiler是名词、compile是动词。 11/02 07:18