作者ryeko (Cry for tomorrow)
看板Electronics
标题Re: [问题] verilog中的`timescale
时间Thu Mar 8 12:00:49 2007
※ 引述《kahang (终於大四了耶^^)》之铭言：
: 请问一下
: 我从书上看到它的用法是
: `timescale reference_time_unit/time_precision
: 可是还是不懂它的意思....||||
reference_time_unit: time unit of the Delay specification
time_precision: decimal place to round
: 可以告诉我reference_time_unit跟time_precision的关系跟例子吗
: 谢谢
EX.
`timescale Unit/Precision Delay Time delay
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`timescale 10ns/1ns #5 50ns
`timescale 10ns/1ns #5.738 57ns
`timescale 10ns/10ns #5.5 60ns
`timescale 10ns/100ps #5.738 57.4ns
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1F：推 luckyBF:简单明了~~酷 03/08 12:40
2F：推 kahang:谢谢你:) 03/08 17:06